Ultimate Engineering Study Guide - Questions & Answers

a) [5] Consider the following CT signal: 0 t1 x(t) = {et 0.W Determine the CT-FT of the following: i) ii) tx(t) b) [5] Determine the CT signal x(t) whose CT-FT is given below: X(jw) = ew [u(w) u(w 2)] [u(w) is the unit step function in frequency domain]
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6. The primary function of a voltage divider is to deliver a regulated output voltage b. provide the required filtering of the power supply provide a selection of output voltages c. d. provide a discharge path for filter capacitors 7. The quality of a power supply depends on its power input b. rectifier output c. load voltage requirements d. filtering circuit 8. Referring to a voltage divider, under load conditions the volt- value depending on the current age will have a passed by the 9. Load regulation is defined as the change in regulated voltage when the load current changes from to 10. Voltage regulators are normally connected in with the rectifier.
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A system has the transfer function: H(S) = 2s + 74 s2 + 11s + 10 The system is realised by a parallel connection of two separate systems, system 1 and system 2. (i) Determine the transfer functions of system 1 and system 2. (ii) Draw a block diagram of the system.
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A commercial building, 60Hz, three phase system, 230V, with total highest single phase ampere load of 1,235 amperes, plus the three phase load of 122 amperes;including the highest rated of a three phase motor of 15Hp, 230V, 3Phase, 42 amperes full load current. Determine the following through showing your calculation.1. The size of Thhn copper conductor, conductor in EMT conduit.2. The Instantenous Trip Power Circuit Breaker size.3. The Transformer size4. Generator size
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2) Do the following using MATLAB a. Display a root locus and pause. b. Draw a close-up of the root locus where the axes go from 2 to 0 on the real axis and 2 to 2 on thee nayinaaxy axis C. Overlay the 10% overshoot line on the close-up root locus. d. Select interactively the point where the root locus crosses the 10% overshoot line, and respond with the gain at that point as well as all of the closed-loop poles at that gain. Generate the step response at the gain for 10% overshoot.
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Q#2 The power flowing in a 3-phase, 400 V, 3 wire balanced load system is measured by two wattmeter method. The reading of wattmeter A is 45 kW and of wattmeter B is 45 kW. Determine: (a) The system power factor (PF), line current, active, and reactive power (b) If the PF is changed to 0.866 lagging calculate the line current and the reading of each device (c) If the PF is changed to 0.866 leading calculate the reading of each device
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Discuss and compare the more conventional electric power cable sizing method involving voltage drop checking and the modern sizing method involving copper loss based on the Building Energy Code. You may answer in point form.
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Given a full-wave single-phase bridge rectifier with a highly inductive load Rl.Calculate:a) Peak voltage on the load.b) Average tension in the load.c) Average current in the load. d) Peak current in the load. e) Effective current in the load.f) Power in the load.g) Average current in the diodes. Data:R = 20 VS = 240V f = 50HzPLEASE SOLVE STEP BY STEP ANSWER FROM C TO Ganws: a) 339.4 b) 216 c) 10.8 d) 10.8 e 10.8 f) 2334 g) 5.4
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Q3) (Total duration including uploading process to the Blackboard: 30 minutes) A square-wave sequence x[n] is given as 1. N (-1. SSN-1 a) Write and plot the x[n]. b) For N = 8, Compute the DFT coefficients X[k] of the x[n] using the Decimation-In-Time (DIT) FFT algorithm
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Problems in EE0021 1. A 3-phase y connected balance load impedance of 3+j2 and a supply of 460 volts, 60 Hz mains. Calculate the following: a. Current in each phase b. Total power delivered to the load C. Overall power factor of the system 2. A 3-phase Wye-Delta Connected source to load system has the following particulars: Load impedance 5+4 ohms per phase in delta connected, 460 volts line to line, 60 hz mains: Calculate the following: a. Voltage per phase b. Voltage line-line C. Line per phase and current line to line
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1.) Find the ID peixe decreased to 330 Given: VGS - OU VDD-15V IDSS 15 MA RD=47052 2.) Find the ID Given: Ves= -2V IDSS=20MA UGS (OFF) =-SU
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1. You are working as an EMC engineer in a company producing electrical and electronic devices and systems. Your primary function is to ensure that your company's products comply with the relevant EMC standards. a. What is the definition of electromagnetic compatibility (EMC) according to the IEC? (2 marks) b. Explain the important to achieve EMC compliance to your company? (4 marks) Discuss the FOUR (4) basic EMC subgroups? (4 marks)
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Q2(a) Illustrate and label an active band-pass filter circuit using Sallen-Key topology with 80 dB roll-off rate. (4 marks) (b) According to your answer in Q2(a), predict the values of resistors and capacitors so that the frequency bandwidth of 400 Hz to 800 Hz with Butterworth response is achieved. You may refer to the Appendix on page 5 for the commercial value of resistor and capacitor. (12 marks) (c) Illustrate the frequency response curve based on the results in Q2(b). (4 marks)
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One 500 hp, 2300 V (line voltage) three-phase induction motor; frequency 60hza- Calculate the approximate full load current, the current with the locked rotor and the currentwithout charge.b. Estimate the apparent power absorbed with the locked rotor.c. State the rated capacity of this motor, expressed in kilowatts.Note: Empirically, the full load current can be found as follows: = 600PHP/l
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All branch circuits recognized by the NEC shall be rated in accordance with the maximum permitted ampere rating of the Select one: Oa. conductor Ob. wire size OC. OCD Od. load center
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Capable of being removed or exposed without damaging the building structure or finish or not permanently closed in by the structure or finish of the building is the definition of Select one: Oa. Useable (as applied to structure) Ob. Accessible (as applied to equipment) Oc. Accessible (as applied to wiring methods) Od. Accessible, Readily (Readily Accessible)
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QUESTION THREE Draw the circuit diagram of a Master-slave J-K flip-flop using NAND gates and with other relevant diagram explain the working of master-slave JK flip flop. What is race around condition? How is it eliminated in a Master-slave J-K flip-flop.
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If you have a signal modulated in PCM, it has a source amplitude of 3V, you install a threshold detector that eliminates any signal that is below 2.1V or above above 4V. The amplitudes are known to be described by a function of uniform probability density, the signals that passed the threshold detector that will have a 5% tolerance with respect to the amplitude of the nominal signal will be demodulated. What percentage of the total emitted signal will be demodulated?
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Q2 A three phase full wave controller using 6 thyristors supplies Y-connected resistive load and the line-to-line input voltage is AC 400 V (rms). (a) Illustrate the three phase full-wave controller circuit suppling a Y-connected resistive load. (b) Calculate the rms voltage output for the delay firing angle of a = /4 (c) Calculate the rms voltage output for the delay firing angle of a = /2.5 (d) Calculate the rms voltage output for the delay firing angle of a = /1.5
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Question 1: Part A: A communications link has an attenuation of 0.2 dB/km. If the input power to the cable is 2 watts, calculate the power level 7.7 km from the transmitter, correct to 3 decimal places. Answer: Part B: A receiver has an effective noise temperature of 294 K and a bandwidth of 1.7 MHz. Determine the thermal noise in decibel watts at the output of the receiver (correct to 2 decimal places). Answer:
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In a full-wave rectifier a. the output is a pure DC voltage b. only the negative half of the input cycle is used only the positive half of the input is used d. the complete input cycle is used c. 2. The main advantage of a bridge rectifier using the same input transformer as a full-wave rectifier is that a. it will double the output voltage b. less current is required for the diodes to conduct C. the ripple frequency is twice that of the full wave recti- fier d, the ripple frequency is on-half that of the full wave recti- fier Filters ordinarily consist of b. series capacitors and series inductors series capacitors and series resistors series inductors and parallel capacitors c. d. parallel inductors and series capacitors 4. As the frequency is increased the reactance of a given filter capacitor decreases and the reactance of a given inductor decreases b. increases C. remain the same d, none of the above 5. A resistor placed across the output of a power supply for the primary purpose of bleeding off the charge of the capacitor is called a. a bleeder resistor b. a voltage divider c. a potentiometer d. none of the above 1. 3.
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Design a circuit that detects whether two two-bit numbers A and B are equal, if A is greater than B, or if A is less than B. Your circuit will have one two-bit output: 11= equal; 01 = A greater than B; 10= A less than B. Implement the circuit using only 8X1 multiplexers and inverters (as needed).
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P2: Given the signal m(t) = 3 cos[200nt] + cos [400nt], with carrier signal c(t) = 5 cos [3000mt] find: a) The bandwidth of the FM signal with kf= 10 [rad/s/V] b) The Power of the FM signal. c) Write the expression of the FM signal.
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A continuous-time signalx(t) is given by x(t) = (t^2 , 1 t 3 0, otherwise(a) Plot the signal x(t) for 2 t 2.(b) Let x[n] be the sampled version of x(t) where x[n] = x(nTs) with a sampling period of Ts = 0.4 s. Plot x[n] for 4 n 4.
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